Input documents for LVS in ICV devices are indexed beneath:
GDS (format circulate report): It is utilized by the LVS device to generate a format netlist via way of means of extraction, that’s used for LVS evaluation.
Schematic netlist: It is used as a supply netlist for LVS evaluation.
Rule deck report: Rule deck report includes required commands and documents to a manual device for appearing LVS. This rule deck report additionally consists of a layer definition, that’s beneficial for extraction.
It is utilized by the device for ICV LVS evaluation and it includes molecular pairs, that are made up of 1 from the format netlist and any other from the schematic netlist.
ICV has neutral software for translation vdd of enter verilog netlist to ICV schematic netlist, that’s similarly beneficial for evaluation purposes.
All gadgets and connections among them are extracted from GDS withinside the format extraction step. The device additionally generates an equivalence factor report after the extraction for evaluation of format and schematic. This equivalence report is beneficial for evaluation.
In the evaluation step, the device evaluates withinside the following manner: The tool compares the variety of gadgets in schematic and format, the variety of nets in schematic and in format, forms of the tool in schematic and in format, after which generates the result reports. Error record consists of a listing of wrong gadgets, and wrong nets, that’s beneficial to debug the LVS problem.
Missing worldwide internet join
Open: Shapes of the nets having identical format textual content on them aren’t intersecting or touching reasons opens in layout. Opens withinside the layout is chargeable for floating connections withinside the layout. This floating connection will purpose the most important defects in chips. So, it’s miles very critical to locate opens withinside the layout. Running open locating software of the PnR device earlier than walking LVS, is useful withinside the early layout phase.
This form of the problem may be solved via way of means of connecting format shapes of unmarried internet this is left open.
Short: If layers in a format having unique format textual content on them are overlapping or intersecting, it’ll bring about a brief withinside the layout. The presence of the quick in the layout will purpose chip failure.
Internal shorts with Macros:
In a layout, because of the complexity of the layout or because of wrong settings, the PnR device may route nets in a manner that creates a brief with the inner geometries of the macros. It also can appear if routing blockage is lacking in the LEF of the macro. Sometimes at the same time as doing guide custom routing, the brief is created among custom directions and the inner routing of the macro.
This brief isn’t always without difficulty said withinside the PnR device environment. When we merge the GDS of the difficult macro with the top-stage block, the quick is seen withinside the GDS. This brief may be debugged the use of VUE software of ICV. Below is a snippet that indicates how a signed internet is incorrectly routed over the difficult macro. The layer is blocked over the macro, as inner geometries of the difficult macro are present. This internet will purpose a brief with the inner geometries of the macro.
PG brief with sign internet:
When there’s a PG brief withinside the layout, it’s miles very tough to discover it. PG brief may be a brief among an energy internet and a floor internet or it can be a brief among an energy/floor internet and a signed internet.
When a PG internet is shorting with pretty lengthy sign internet and for the reason that PG internet is hooked up to such a lot of gadgets, it’s miles very tough to pin-factor a brief location. To debug this problem, there’s a manner in ICV to feature textual content at the sign internet that’s shorting with PG internet.
If a number of the spice report or GDS report is lacking at the same time as merging database, it indicates a lacking additives error. For example: when you have molecular ABC used withinside the layout, but now no longer v d d described in the GDS listing or spice listing for use for LVS flow, it can purpose lacking additives error. Either the listing wishes to be changed or ABC molecular wishes to be excluded from the LVS evaluation (this relies upon the capability of the molecular, most effective bodily cells can be excluded withinside the evaluation).
Missing worldwide internet join:
If PG pins of the cells aren’t always related to any energy/floor internet the use of connect_pg_net commands, it reasons tool mismatches and LVS mistakes for the maximum of the layout. For example, even though the same old molecular PG pin call is VDD, the device does now no longer join it to the VDD internet of the layout. We want to apply the beneath command to attach such pins.
LVS is a beneficial approach to confirm the correctness of the bodily implementation of the netlist. open, shorts, lacking additives, and lacking worldwide internet join are capacity problems that may affect the capability of layout and won’t be detected at the early implementation stage, so LVS is beneficial to record those problems in the layout. Once those problems are said via way of means of Physical verification devices, they can be solved via way of means of numerous strategies as mentioned in this article.